职位名称：数字后端设计工程师
职位描述：
1. 掌握并熟练应用从RTL到GDS的设计流程；
2. 完成时序约束，逻辑综合，静态时序分析，功耗分析，电压降分析，电迁移分析；
3. 完成布局规划，电源规划，布图布线，物理验证；
4. 完成DFT逻辑设计和验证，完成DFT模式时序约束，帮助DFT模式时序收敛；
5. 帮助芯片bring-up，完成测试向量的调试，良率的提升；
6. 为客户/现场应用工程师/销售人员提供技术支持。
职位要求：
1. 电子工程硕士或更高学历；
2. 学习勤奋，工作积极投入；
3. 具备以下单项或多项经验: 从RTL到GDS的设计实现，芯片级测试，ASIC编码和模拟，ASIC物理版图，集成电路制造和工艺；
4. 富有事业心和团队合作精神，良好的中英文听说读写能力。
工作地点： 上海/成都
Title: Physical Design Engineer
Responsibilities:
1. Master and be familiar with the RTL to GDS design flow.
2. Complete timing constraint, logic synthesis, STA, power analysis, IR Drop analysis, EM analysis.
3. Complete floorplan, power plan, P&R, physical verification.
4. Complete DFT logic design and verification, DFT mode timing constraint and support DFT mode timing closure.
5. Support chip bring-up, complete test pattern debugging and yield improvement.
6. Provide technical support for customer/FAE/sales.
Requirements:
1. Master's or above degree in EE or above.
2. Study hard and work actively.
3. Have following single or multiple experiences: design implementation from RTL to GDS, chip level testing, ASIC coding and simulation, ASIC physical layout, IC manufacture and process.
4. Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
Location: Shanghai/Chengdu