1.To manage integration of all modules’ processes and the respective derivatives.
2.To provide a leading role in the developing, transferring and maintaining of advanced DRAM
fabrication technology with good process capability and high yield.Lead new technology transfer from mother fab or process development.
3.Owner of new prototype lots and ensure 100% success rate.
4.Drive process robustness improvement by providing root cause analysis and and collaborate improvement actions to meet 100% wafer acceptance test (WAT) Cpk goal & Baseline D0 target.

1.Bachelor and above
2.Microelectronics/Material Science
3.At least 2 years’ relevant process integration experience