工作职责:
1. Implement DFT structures (internal-scan (stuck-at, at-speed), JTAG, MBIST, hard IP testing structure) in complex SOC design.
2. Implement Automotive DFT structures in SOC design
3. Generate, simulate and debug the chip level test bench.
4. Interface with back-end physical design team to complete timing closure for test related logic
5. Interface with operation team to debug production test-vectors for wafer test and final test
任职资格:
1.M.S. or B.S. degree in EE or equivalent
2.5+ years work experience in DFT design
3. Strong experience in ASIC DFT logic design and verification
4. Attend the training course of Functional Safety
5. Familiar with automotive DFT design flow
6. Logical thinking and sensitive to the problem with good self-study and problem shooting ability
7. Good communication capability and teamwork spirit