JD:
模块至顶层级的DFT测试计划、测试结构定义，测试SPEC；
DFT电路的实现和验证，优化并完善DFT设计流程，包括MBIST、SCAN、boundary scan、ATPG以及其他可测性电路设计；
配合完成数字前端设计流程，包括DC、FM、STA、功耗分析等；
DFT相关的STA/Power等方面的Signoff；
DFT设计和验证自动化流程及最终量产测试的向量产生和验证;
协助完成ATE机台测试failure 诊断并提供解决方法；




Requirements：
大学本科以上学历，微电子／电子工程／通信工程等相关专业 ；
相关的DFT技术和设计流程工作经验；
精通测试pattern仿真、芯片测试、良率分析及debug；
熟悉主流EDA工具；
熟悉数字逻辑设计、综合、静态时序分析；
掌握shell/TCL/Perl/Python脚本语言；
了解CP/FT测试流程；
良好的英文沟通能力；




公司简介：
Founded in 2018, founder has 20 years’ IC industry experience, worked for top IC companies like IBM, AMD, Synopsys, Verisilicon, SYNAPSE and Intel as leader, has long-term, solid and positive relationships with all patterners. And the team members most have 10+ years’ IC design experience, merging with the fastest growing technology both in ASIC and SOC field, patterner including AMD, ADI，GlobalFoundries, HiGon, ZTE，GPT, SYNAPSE，MICROPILOT…
Mass production including diverse productions: 7nm/14nm GPU design chip, 28nm high-end graphic chip, 28nm mobile phone chip, 28nm low-power graphic chip, 40nm networking chipset, 55nm mobile chip… we also provide professional, effective and practical consulting service for newly established company.
Now we have Beijing, Shanghai, Nanjing, Chengdu sites, to support flexible and high-efficiency working model both for patterner and employee.