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FPGA Design Engineer - J10833
40-60万/年
人 · 硕士 · 3年及以上工作经验 · 性别不限2024/11/07发布
五险一金补充医疗保险补充公积金员工旅游餐饮补贴绩效奖金股票期权弹性工作定期体检带薪假期

浦东新区

低价好房出租>>

上科路88号豪威科技园区

公司信息
豪威科技(上海)有限公司

外资(欧美)/1000-5000人

该公司所有职位
职位描述
Overview:
As a Sr./Staff digital design engineer in Mix Signal Verification Team, the candidate will be involved in FPGA design, digital module verification to support OmniVision's future generation sensor & ASIC products and super high speed FPGA platform.

Primary (70%):

1. Responsible for FPGA design, high speed module design, simulation and on board debug.
2. Responsible for frontend digital design and verification for advanced technology chips.
3. Participate in FPGA/chip architecture definition and design document writing.

Secondary (30%):
1. Research on super high speed system verification platform.
2. Assisting embedded FW development for SOC architecture.
任职资格:
1. 3 years+ working experience in digital design and system design
2. Strong analytical, and problem solving skills as well as hands-on lab debugging skills.
3. Skillful FPGA and system design is required. Good knowledge of digital design and system design.
4. Be experienced in FPGA IP using, such as PLL, DDR, PCIe, transceiver.
5. Have a good knowledge of timing analysis
6. Good communication skills between teams, and also in technical writing and reporting.
7. Self-motivated and ability to excel in a team environment.

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