岗位职责：
61 Perform FPGA requirements capture, architecture definition, design, synthesis, place & route and timing analysis.
61 Perform FPGA RTL test bench generation, RTL/gate level simulation, physical testing on target board.
61 Complete FPGA device integration and verification with hands-on experience in product integration, testing, and debugging using oscilloscopes, logic analyzers; resolve the issues found during the integration/verification.
61 Work closely with hardware and software engineers to integrate FPGA design into module.
61 Ability to achieve FPGA development results in a cross-functional environment
61 Ability to provide technical solution/ proposals when work on the specific product, etc.
61 Assure proper technical data and substantiation generated from the assigned projects and tasks consistent with engineering policies and procedures

*职位要求
61 Bachelor's degree or above cover Microelectronics, computer, electronic information engineering, electronic science and technology, communication engineering and other related majors.
61 Minimum of 1 years’ experience of developing FPGA.
61 Proficient in Verilog language, proficient in Vivado/Quartus development tools.
61 Familiar with ModelSim simulation envirnment.
61 familiar with common low-speed interfaces, such as GPIO, UART, SPI, IIC, CAN, etc.
61 High-speed interface, such as PCIe, Ethenet, EMIF development experience is preferred.
61 AXI interface design, high-speed data acquisition and development experience is preferred.
61 Good communication skills