工作职责: 1. Responsible for the development and support of customer based design form netlist to GDS tape out; 2. Responsible for block floorplan, CTS, Power plan, Placement & Routing, SPF extraction, STA and Physical verification. 3. Responsible for complex IP physical implementation. 任职资格: 1.M.S. or B.S. degree in EE or equivalent 2.4+ years of experience and minimum of BS in EE or equivalent; MS is a plus 3. Background in block level Place and Route. 4. Scripting expertise (Perl, Tcl, or Python) a strong plus; 5. Actual chip tapeout experience on advance technology node (28nm or below) a strong plus. 6. Self-motivated, good communication skill and team work spirit.