工作职责:
1. Take charge of slightly complex peripheral IP integration in a SoC design, such like SDIO/QSPI/PWM/CIPHER.
2. Do IP QA for owned IPs, understand the clock, reset and all other interfaces with the whole SoC.
3. Write c code based test cases for owned IPs
4. Run RTL and post simulation and analyze logs/reports for owned IPs
5. Write sdc for owned IPs, and analysis timing reports
6. Write technical documents for all the work above
任职资格:
1.CS or EE MS/BS
2.3+ years of relevant experiences
3. Verilog, C language
4. SDIO/QSPI communication protocol
5. AXI, AHB, APB bus protocol
6. TCL for syn