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Layout Engineer
9千-1万·14薪
10人 · 本科 · 在校生/应届生 · 性别不限2025/01/11发布
五险一金补充医疗保险补充公积金员工旅游餐饮补贴专业培训绩效奖金年终奖金弹性工作定期体检

信息港大厦

公司信息
西安来颉半导体有限公司

外资(非欧美)

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职位描述
[Job Description]
1. Complete the layout design of analog or digital-analog mixed IC according to the requirements of the design engineer.
2. Make floorplan of the chip and design the layout of each module.
3. Complete the DRC and LVS verification of the layout.
4. Write layout related document.
5. Assist test engineers and circuit engineers to debug.
[Job Requirements]
1. Bachelor degree or above, major in electronic engineering, microelectronics or integrated circuits.
2. Have a certain theoretical knowledge base of digital and analog circuits and semiconductors.
3. Familiar with the analog layout design process and Candence tool users are preferred.
4. Experience in layout design is preferred.
5. Basic English reading and writing skills.
[Preferred qualifications]
Focused and humble; Self-motivated and curious; Innovative and drive for results; Team player
Please join our young and energetic M3Tek R&D team, and let’s work together to create a brighter future!
【Company Benefits】
Five insurances and one housing fund, catering subsidies, free physical examinations, commercial insurance
Holiday benefits, paid annual leave, marriage leave, maternity/paternity leave
Year-end bonus (14 months), performance bonus (incentive program)
Flexible working hours, weekends, free coffee snacks, monthly birthday parties, birthday gifts
Professional training, regular team building

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