Job responsibilities: 1. Cooperate with foundry to improve product yield & reliability; 2. Cooperate with foundry to setup & optimize design rule & device target; 3. DRAM Cell characteristic & Peri Transistor optimization 4. WAT parameter trend management 5. Cooperate with test team for Yield/Reliability analysis & improvement 6. Cooperate with test team for fail mechanism analysis and Improvement
Job Requirements: 1, Full CMOS process understanding 2. Understanding of DRAM Cell process integration 3. Understanding of WAT parameter 4. Understanding of Reliability parameters 5. Problem identification and troubleshooting 6. Good communication with co-related person 7. Self-motivated and able to work independently 8. Good communication in English