Tittle : Semiconductor package development Engineer
Job grade : Sr engineer or manager level
Direct Report to VP of RnD

Job description
1. Technical leader for the entire development until research & development project closed.
2. Responsible and owner for DFMEA, PFMEA, CP, APQP documents readiness and phase review complete
3. Predict and detect technical risk impacting to quality, reliability, DFM, schedule, cost, production cycletime, for the research development objectives, analyze root causes and lead technical solution activities with project team
4. Co-leader for Design of POD, MOD, lead frame, DBC, jigs and tools and material properties together with design and material development function
5. Governing each process, material, reliability, quality, DFM and cost issues to meet project objectives
6. Plan out evaluation, data analysis, decision making to move forward the project as technical leader
7. Co-leader of entire project objectives with project(program) manager
8. To manage BOM,UPH, Productivity in technical point of view to meet product margin

Qualification required
a. Min 3 years in Semiconductor package development experience
b. Min Bachelor in science or Engineering
c. Good understanding of power semiconductor's electrical, and thermal characteristics and thermo-mechanical behavior
d. Familiar with material properties, its impact to quality and reliability of power semiconductor
e. able to run the project under APQP procedures
f. Familiar with DOE and its tool operation like JMP or Minitab
g. Understanding of project management to work with project manager
h. Mater or PhD will get advantages