工作职责:
1.In charge of full-chip level/block level circuitry design verification;
2.Develop verification platform includes test bench and regression system creation;
3.Develop behavior model, assertions/checker/monitor based on the memory architecture and functionality;
4.Build test plan and verify the functionality of design, run coverage and regression, analyze coverage gaps and diverse strategy to fill coverage holes;
5.Provide support to design team for circuitry debug.
任职资格:
1.Basic knowledge and understanding of CMOS circuitry design;
2.Familiar with EDA design tools such as Spectre, finesim, Virtuoso, verilog etc.;
3.Experience in UVM, SystemVerilog, VPI/PLI, assertion coding preferred;
4.Experience in LPDDR4 DRAM product verification would be a plus;
5.Good team player and communication skills;
6.Good learning competency, self-motivated in a flexible and dynamic environment.