Responsibilities:
61Process development on SMT, Die Attach, Flip chip, Underfill, interact Technology, Material & Equipment.
61Interface of process, to communicate the requirement from inner/outer customers.
61Generate new recipe and perform process optimization for SMT/FCA/UF process;
61Review new package process flow and design drawing, maintain design rule and process control documents;
61Conduct engineering DOEs and apply statistical analysis method to solve problems, make decision with data;
61Co-work with NPE/APE to trouble shooting for SMT/FCA/UF process.

Qualifications:
61Master degree or above in Material, Electric, Semiconductor or engineering related;
61Skills in DOE design and statistical analysis tools, example: JMP
61Be capable of analyzing SEM/FIB/TEM/EDX results, operating is preferred.
61Good English communication (written and verbal) skills.
61Self-motivated, teamwork, hardworking, and be able to work under high pressure.